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第13回ASE研究会のお知らせ

　第13回となります、先進スーパーコンピューティング環境研究会（ASE研究会）開催のご連絡をいたします。
　今回は、招待講演として米国ジョージア工科大学から Aparna Chandramowlishwaran 氏をお呼びし、エクサスケールに向けた高速アルゴリズムの話題で、Fast Multipole Method (FMM)を取り扱ったケースについての講演を行います。
　また、招待講演者として、米国サンディア国立研究所から、Mark Hoemmen 博士をお呼びし、アルゴリズムベースのフォールト・トレラント(FT)と、システムのコデザインに関する講演を行います。

第13回ASE研究会開催予告

日時：2012年12月4日（火）14時20分～17時40分
場所：東京大学情報基盤センター（本郷キャンパス弥生地区）３階大会議室（地図）
主催：東京大学情報基盤センター　スーパーコンピューティング部門

Program

13th Advanced Supercomputing Environment (ASE) Seminar


4th December (Tuesday), 2012
Large Meeting Room, 3F, Information Technology Center (Hongo Campus), The University of Tokyo


14:20 - 14:30　Opening

　Takahiro Katagiri (The University of Tokyo, Japan)


14:30 - 15:30　Invited Talk (1)

Invited Speaker

　Ms. Aparna Chandramowlishwaran (Georgia Institute of Technology, USA)

Title

　Fast Algorithms at Exascale and Beyond: A Case Study of the FMM

Abstract

　We are entering the era of exascale. The number of cores are growing at a much faster rate than bandwidth per node. What implications does this trend have in designing algorithms for future systems? If we were to model computation and communication costs, what inferences can we derive from such a model for the time to execute an algorithm? Practice informs theory. We present scalable implementations and analysis of the Fast Multipole Method (FMM) for solving N-body problems. It is broadly applicable to a variety of particle simulations used to study various computational science problems and is among the most attractive solutions for scalable particle simulation on future systems.
　We will try to answer two key questions: How to engineer fast code for today's platforms and how to understand scalability on future systems? We present an in-depth multicore optimization and tuning for FMM, along with an approach for finding and fixing bottlenecks in a code. We will also describe a new algorithmic complexity analysis that is based on the idea of co-design.


15:30 - 15:45　Break


15:45 - 16:45　Invited Talk (2)

Invited Speaker

　Dr. Mark Hoemmen (Sandia National Laboratories, USA)

Title

　Fault-tolerant solvers via algorithm / system codesign

Abstract

　Protecting arithmetic and data from corruption due to hardware errors costs energy. However, energy increasingly constrains modern computer hardware, especially for the largest parallel computers being built and planned today. As processor counts continue to grow, it will become too expensive to correct all of these "soft errors" at system levels, before they reach user code. However, many algorithms only need reliability for certain data and phases of computation, and can be designed to recover from some corruption. This suggests an algorithm / system codesign approach. We will show that if the system provides a programming model to applications that lets them apply reliability only when and where it is needed, we can develop "fault-tolerant" algorithms that compute the right answer despite hardware errors in arithmetic or data. We will demonstrate this for a new iterative linear solver we call "Fault-Tolerant GMRES" (FT-GMRES). FT-GMRES uses a system framework we developed that lets solvers control reliability per allocation and provides fault detection. This project has also inspired a fruitful collaboration between numerical algorithms developers and traditional "systems" researchers. Both of these groups have much to learn from each other, and will have to cooperate more to achieve the promise of exascale.


16:45 - 17:00　Break


17:00 - 17:30

Speaker

　Takahiro Katagiri (The University of Tokyo, Japan)

Title

　Development of ppOpen-AT: An Auto-tuning Description Language for ppOpen-HPC

Abstract

　ppOpen-AT is an auto-tuning (AT) language for code optimization in 5 kinds of crucial numerical methods provided by ppOpen-HPC project. In this presentation, we present preliminary result of ppOpen-AT. In particular, adaptation to ppOpen-AT to a numerical kernel derived by explicit method on Finite Difference Method is shown. We have developed a new AT function on ppOpen-AT for its code optimization such as: loop fusion and loop split. Performance evaluation is performed with current supercomputers and CPUs with multicore chips.


17:30 - 17:40　Closing

　Takahiro Katagiri (The University of Tokyo, Japan)


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本研究会の問い合わせ先

〒113-8658　東京都文京区弥生2－11－16
東京大学　情報基盤センター


ASE研究会幹事　准教授　片桐孝洋
E-mail：katagiri＠cc.u-tokyo.ac.jp
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